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PRODUCTS

Overview
AG3335SD is a highly integrated low power, RFSoC GPS receiver with an application processor, GPS receiver, and a power management unit (PMU).

AG3335SD contains an ARM® Cortex®-M4F application processor that can operate in a range of frequencies between 26MHz and 530MHz, and achieve high performance and power efficiency with Level one cache (L1 cache).

The GPS subsystem contains the RF and baseband circuits, which are able to track L1+L5 satellites at the same time (AG3335S could not track L5 satellites), and search GPS satellites using the L1 circuit.

The PMU contains five ultra-low quiescent current low-dropout linear regulators (LDO) to provide a stable power source for the internal and external devices.

Multi –GNSS receiver

·       L1 and L5 dual-band GNSS receiver (*)

·       Multi-Constellation GPS/GLONASS/Galileo/ BeiDou/NavIC(*)/QZSS receiver

·       Support for SBAS ranging, WAAS, EGNOS, MSAS and GAGAN

·       Integrated 12 multi-tone active interference cancellers

·       RTCM ready (RTCM v2.3 and v3.3)

·       Indoor and outdoor multi-path detection and compensation

 Software features

·       EPOTM orbit prediction

·       EASYTM self-generated orbit prediction

·       LOCUSTM logger function

·       Support for time service application, which is achieved by the PPS vs NMEA feature

 Microcontroller subsystem

·       530MHz ARM® Cortex®-M4 with FPU and MPU

·       MCU operating frequency at 26, 192, 384, and 530MHz

·       17 DMA channels

·       One RTC timer, eight 32-bit general purpose timers

·       Development support: SWD, JTAG

·       Crypto engine

o   AES 128/192/256 bits

o   SHA-1/224/256


·       True random number generator

·       Secure boot, anti-clone, and anti-rollback

·       JTAG password protection

Memory

·       Up to 664KB SYSRAM, with zero-wait state and 265MHz maximum frequency

·       80KB retention SRAM

·       Up to 32KB L1 cache, with high hit rate, zero-wait state and 530MHz maximum frequency

·       Support for external SPI SRAM

o   Maximum speed 26Mhz


·       AESOTF (AES on-the-fly) to secure the data stored in flash

Communication interfaces

·       Two I2C master (3.4Mbps) and one I2C slave interfaces

·       Three UART interfaces (3Mbps, with hardware flow control)

·       Two SPI masters and one SPI slave

·       2 PWM channels

 
Power management

·       Integrated LDO regulators with low quiescent current for RTC, RF frontend and GPIOs

·       Support for external wakeup

·       Over-current and thermal overload protection

·       Under voltage lockout protection

·       Operating temperature from -40°C to 85°C

 Clock source

·       Support 26/48MHz TCXO

·       Support 32kHz crystal oscillator

 Package

·       3.4mm x 3.8mm x 0.64mm WFBGA with 0.4mm ball pitch